What is latch?

Ⅰ.What is latch?

A latch is a type of pulse-sensitive memory cell circuit. They have the ability to change state in response to a certain input pulse level. Latching is the process of momentarily storing a signal in order to maintain a specific level state. The latch's primary job is to cache data, followed by solving the asynchronous problem of the high-speed controller and slow peripherals, the driving problem, and ultimately the problem of an I/O port that can both output and input. Level control data input is used in latches, which include latches without enabling control and latches with enabling control.

Ⅱ.What’s the function of the latch?

Latch is a type of pulse-sensitive memory cell circuit. They have the ability to change state in response to a certain input pulse level. Latching is the process of momentarily storing a signal in order to maintain a specific level state. The latch's primary job is to cache data, followed by completing high-speed management of the asynchronous problem with sluggish peripherals, solving the driving problem, and finally solving the problem of an I/O port that can both output and input data.

Ⅲ.What’s the working principle of the latch?

Working Principle of latch

Components:

D Flip-Flop: Core storage element.

AND, OR, NOT gates: Logic operations.

Clock (C): Synchronization signal.

Inputs: D (Data), C (Clock), C̅ (Inverted Clock).

Outputs: Q (Stored data), Q̅ (Inverted Output).

Connections:

The D input is connected to the AND gate and other logic components.

The Clock signal (C) is used to trigger state changes.

The output Q represents the stored data and is connected to various components.

The Q̅ (inverted Q) output provides complementary output.

Latches operate on level-triggered principles:

1. Data Capture: Input state is stored when the enable signal is active

2. Data Retention: Output maintains its state until new data is latched

3. State Maintenance: Stored value remains stable independent of input changes
   (Pedroni, 2020)

In the case of LED and digital tube displays, it is frequently necessary to refresh continually and quickly in order to maintain a data display. Particularly on strobed display systems, such as four-segment eight-digit digital tubes. It will be refreshed every 30 milliseconds, which is within the human-acceptable refresh frequency. This takes up a lot of the processor's processing time, uses a lot of the processor's processing power, and wastes a lot of the processor's power.

In this case, latches can significantly reduce the processor's workload. When the CPU transfers data to the latch and latches it, the latch's output pin remains in the data state until new data is latched. In this method, the processor's processing time and the IO pin can be released while the digital tube's display information remains unchanged. The processor's processing time is clearly confined to when the display content changes, which is only a small portion of the total display duration. After processing, the processor will have more time to do other things. The latch serves this purpose in LED and digital tube displays: it saves important MCU time.

Ⅳ.Where can latch be used?

The term "latch" refers to the fact that the state of the output terminal does not change with the state of the input terminal, and that the input state is only saved to the output when a latch signal is present, and that it is not changed until the next latch signal arrives.

Integrated circuits make the most use of latches. In digital circuits, they are utilized as store elements in sequential circuits. Latches are sometimes utilized as data registers in arithmetic circuits.

It can be utilized independently after being packed as a standalone product, and the data is effectively delayed while the clock signal is valid. This means that the clock signal is sent first, followed by the data signal.

In some applications, an external latch on the microcontroller's I/O port is necessary. To achieve address multiplexing, for example, when a single-chip microcomputer is coupled to off-chip memory, a latch must be connected. Assuming that the MCU port's 8 I/O pins are used for both address and data signals, the address can be latched using a latch. (Specific operation: send the address information first, which will be locked at the address end of the peripheral by the ALE enable latch, then send the data information and read and write enable signals, and read and write at the given address)

If the single-chip microcomputer's bus interface is only used for one purpose, no latch is required; if the single-chip microcomputer's bus interface is utilized for two purposes, a latch is required. For example, two LEDs must be controlled by an I/O port. When transmitting data to the first LED, "open" the first latch and "lock" the second latch to save the data. When transmitting data to the second LED, "open" the second latch while "locking" the first latch to preserve the data on the first LED. Three latches can be employed if one port of a single-chip microcomputer is to be used for three functions, and the operation method is comparable. The latch can be thought of as an expander of the microcontroller's I/O port in this case.

Real-World Uses
1 Display systems include LED screens.
• Seven-segment, multi-digit displays
• Management of refresh rate (usually 30 ms cycles)

• Reduction of processor workload
2 Digital systems include state machines, data registers, memory buffers, and sequential circuit elements (Tocci et al., 2019).

Ⅴ.The role and difference between latches and buffers

The latch's purpose is to keep the current state locked so that the data sent by the CPU stays at the interface circuit's output for a period of time and the state does not change until the lock is released. Latches are found on several chips. The 74LS244 chip, for example, has a latching capability. The output will remain in its current state when a pin is set high, and it will not change until the pin is cleared.

Buffer registers are also known as buffers, and they are divided into input and output buffers. The former's job is to temporarily store data sent by the peripheral so that the processor may retrieve it; the latter's job is to temporarily store data sent by the processor to the peripheral. The numerical control buffer allows the high-speed operating CPU to coordinate and buffer the slow-functioning peripherals in order to achieve data transmission synchronization. The buffer must have a three-state output function because it is connected to the data bus.

Ⅵ.Commonly used 74 series latch chip introduction

1. 74-series

This is an older product that is still in use but is being phased out gradually.

2. 74H-series

This is a more advanced version of the 74-series, a high-speed TTL product. The NAND gate's average transmission time is roughly 10ns, yet the circuit's static power consumption is quite high. This series of items is currently utilized less and less and is being phased out.

3. 74S-series

This is TTL's Schottky high-speed series. Anti-saturation Schottky diodes are utilized in this series, which have a faster speed but fewer variations.

4. 74LS-series

In the current TTL type, this is the major product line. There are numerous manufacturers and varieties to choose from. Because of its great performance-to-price ratio, it is currently commonly employed in tiny and medium-sized circuits.

5. 74ALS-series

The "advanced low-power Schottky" series is what it's called. It is a successor product to the 74LS-series, with substantially enhanced speed (average value of 4ns), power consumption (typical value of 1mW), and other features, but at a rather high price.

6. 74AS-series

This is the successor of the 74S-series, with major improvements in speed (average value of 1.5ns), and is also known as the "advanced ultra-high-speed Schottky" series.

7. 74HC-series

Like 74HC259, the 54/74HC family of high-speed CMOS standard logic circuits feature the same workability as the 74LS series, as well as the CMOS integrated circuit's inherent low power consumption and wide power supply voltage range. With the identical serial number, 74HCxxx is a duplicate of 74LSxxx. The last few numbers of the model are identical, suggesting that the logic function and pin configuration of the circuit are totally equivalent, making the 74LS and 74HC interchangeable.

References

Floyd, T. L. (2021). Digital fundamentals (12th ed.). Pearson.

Mano, M. M., & Ciletti, M. D. (2022). Digital design: With an introduction to the Verilog HDL (6th ed.). Pearson.

Morris, J. M., & Ciletti, M. D. (2021). Digital design and computer architecture (3rd ed.). Morgan Kaufmann.

Pedroni, V. A. (2020). Circuit design with VHDL (3rd ed.). MIT Press.

Tocci, R. J., Widmer, N. S., & Moss, G. L. (2019). Digital systems: Principles and applications (12th ed.). Pearson.

Wakerly, J. F. (2017). Digital design: Principles and practices (5th ed.). Pearson.